“Design of Ion-Implanted MOSFET’s with Very Small Physical Dimensions,” by Robert H. Dennard, Fritz H. Gaensslen, Hwa-Nien Yu, V. Leo Rideout, Ernest Bassous, and Andre R. LeBlanc of IBM, appeared in the IEEE Journal of Solid-State Circuits in October 1974, volume 9, pages 256 to 268. It set out the scaling rules that became known, after the lead author, as Dennard scaling.
The paper’s core result is a set of proportions for shrinking a transistor without breaking it. If you reduce every linear dimension by a factor and reduce the operating voltage by the same factor while raising the doping concentration, the smaller transistor behaves like a scaled copy of the larger one - it switches faster, takes less area, and, crucially, the power consumed per unit of chip area stays roughly constant. That last point is the magic of Dennard scaling: each new generation could pack in more, faster transistors at the same power density.
For about three decades this held, and it was the quiet partner to Moore’s Law. Moore’s Law said transistor counts would double; Dennard scaling explained why those extra transistors could actually be switched on and clocked faster without the chip melting. Together they delivered the relentless free performance gains that the whole computing industry came to expect. Around 2005 Dennard scaling broke down: at very small sizes, leakage current and heat stopped cooperating, voltages could no longer be cut in step, and clock speeds flattened. The industry’s response was to spread work across many cores and, eventually, across specialized accelerators.
Why business readers should care: the end of Dennard scaling is the deep reason AI runs on GPUs and custom chips rather than ever-faster single processors. When free speedups stopped arriving from physics, performance had to come from parallelism and specialization - exactly the hardware story behind the modern AI boom.