RISC-V is an open instruction-set architecture that began as a research project at the University of California, Berkeley, in 2010. Unlike commercial architectures such as ARM or x86, whose specifications are owned and licensed by a single company, RISC-V is published as a public standard that anyone may implement without paying royalties or signing a license. The official ratified-specifications page states plainly that the RISC-V specifications “are all free and publicly available.”
The architecture is deliberately small at its core. The standard defines a minimal base integer instruction set, designated RV32I or RV64I depending on register width, that is sufficient to build a complete computer. The RISC-V Instruction Set Manual, the primary specification maintained in the riscv/riscv-isa-manual repository, splits the architecture into an unprivileged volume describing the instructions an application sees and a privileged volume describing the system and supervisor environment.
What makes RISC-V distinctive is its modular, extension-based design. Beyond the base integer set, optional standard extensions add capabilities such as integer multiplication and division (M), atomic operations (A), single- and double-precision floating point (F and D), and compressed 16-bit encodings (C). A designer chooses only the extensions a given chip needs, so the same ISA spans tiny embedded microcontrollers and large application processors. The specification is collaboratively developed, ratified, and maintained by the members of RISC-V International.
This openness mirrors the original Berkeley RISC tradition. The faculty behind RISC-V, including David Patterson, who had led the first Berkeley RISC project decades earlier, argued that an instruction set is a piece of public infrastructure that should not be locked behind a single vendor’s patents and licensing terms. Releasing the ISA as an open standard let universities, startups, and established companies build compatible processors and share a common software ecosystem.
By making the contract between hardware and software free to implement, RISC-V lowered the barrier to designing custom silicon and attracted broad industry and academic adoption. It became the focal point for open-hardware efforts and a credible alternative to proprietary architectures, demonstrating that the same open-collaboration model that reshaped software could be applied to the instruction set itself.